| 摘要 |
PURPOSE:To shorten the diagnostic time of a fault in a fault disgnosis by narrowing the range wherein the range has not been narrowed by a conventional narrowing means by the fan-in tracing from an error detecting place. CONSTITUTION:From a test pattern 10, an input pin F whose value (d) is fixed in the pattern and the value '0' are extracted and outputted as fixed-value pin information 11. The operation is repeated until the value from the input pin F to the output side is determined with circuit-logic connecting information 9. In this case the value is determined up to a signal line N3. Thereafter, the range of fault is narrowed by fan-in tracing from an output pin Z, where the error is detected. At this time, an input N2 at an AND gate C is fixed. Therefore, when the single fault is fixed, it is found that there is no fault on the fan-in side of a signal line N5. Thus, the narrowed fault information 12 is formed. |
