发明名称 DATA PROCESSING DEVICE AND DRIVING METHOD THEREOF
摘要 In a processor or the like including a reconfigurable (RC) circuit, the RC circuit is used to form a test circuit to test a core, a cache memory, or the like, and then part of the RC circuit is used as an auxiliary cache memory. When a memory can store data after stop of power supply, a startup routine program (SRP) of the processor can be stored therein. For example, after the test, an SRP is loaded to a memory in the RC circuit from an external ROM or the like, and when power is resupplied to the processor, a startup operation is performed using the loaded SRP. When the processor is in a normal operation state, this memory is used as an auxiliary cache memory and the SRP is overwritten. The SRP is loaded to the memory again at the end of use of the processor.
申请公布号 US2016285457(A1) 申请公布日期 2016.09.29
申请号 US201615181646 申请日期 2016.06.14
申请人 Semiconductor Energy Laboratory Co., Ltd. 发明人 KUROKAWA Yoshiyuki
分类号 H03K19/177;G06F9/445;G11C7/12;G11C7/10;H03K19/173;G06F12/08 主分类号 H03K19/177
代理机构 代理人
主权项 1. (canceled)
地址 Atsugi-shi JP