发明名称 |
Power-on reset architecture |
摘要 |
A power-on reset circuit for providing a reset signal to an active device on an integrated circuit (IC). The circuit includes a RC circuit for producing a reset signal until its capacitor fully charges. The circuit also includes a voltage detector for preventing the charge from collecting on the capacitor of the RC circuit until the voltage is at a functional level.
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申请公布号 |
US5180926(A) |
申请公布日期 |
1993.01.19 |
申请号 |
US19910798190 |
申请日期 |
1991.11.26 |
申请人 |
SEQUOIA SEMICONDUCTOR, INC. |
发明人 |
SKRIPEK, MICHAEL R. |
分类号 |
H03K17/22 |
主分类号 |
H03K17/22 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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