Efficient integration of CMOS with poly resistor

摘要

Device and methods for forming a device are presented. The method includes providing a substrate. The substrate includes a resistor region defined by a resistor isolation region. A resistor gate is formed on the resistor isolation region. An implant mask with an opening exposing the resistor region is formed. Resistor well dopants are implanted to form a resistor well in the substrate. The resistor well is disposed in the substrate below the resistor isolation region. Resistor dopants are implanted into the resistor gate to define the sheet resistance of the resistor gate. Terminal dopants are implanted to form first and second resistor terminals at sides of the resistor gate. A central portion of the resistor gate sandwiched by the resistor terminals serves as a resistive portion.

主权项

1. A method for forming a device comprising:
providing a substrate, wherein the substrate includes a resistor region defined by a resistor isolation region and a transistor region surrounded by a transistor isolation region; forming a gate layer over the substrate; patterning the gate layer to define a resistor gate on the resistor isolation region and to define a transistor gate on the transistor region, wherein the resistor and transistor gates are separate gates; forming a first implant mask with at least first and second openings on the substrate after the resistor and the transistor gates are defined, wherein the first opening exposes the resistor region and the second opening exposes the transistor region; implanting resistor well dopants to form a resistor well in the substrate, the resistor well is disposed in the substrate below the resistor isolation region; implanting resistor dopants into the resistor gate to define the sheet resistance of the resistor gate; implanting lightly doped drain (LDD) dopants into the substrate to form LDD regions in the transistor region adjacent to the transistor gate, wherein implanting the resistor well dopants to form the resistor well, implanting the resistor dopants into the resistor gate and implanting LDD dopants to form the LDD regions are performed using the first implant mask; and implanting terminal dopants to form first and second resistor terminals at sides of the resistor gate, wherein a central portion of the resistor gate sandwiched by the resistor terminals serves as a resistive portion.