Content addressable memory cells, memory arrays and methods of forming the same

摘要

A content addressable memory cell is provided that includes plurality of transistors having a minimum feature size F, and a plurality of memory elements coupled to the plurality of transistors. The content addressable memory cell occupies an area of between 18F2 and 36F2.

主权项

1. A content addressable memory cell comprising:
a first transistor disposed in a first transistor layer above a substrate; a second transistor disposed in a second transistor layer above the first transistor layer, the second transistor coupled to the first transistor; a third transistor disposed in a third transistor layer above the second transistor layer, the third transistor coupled to the second transistor; and a memory element disposed in a memory element layer above the substrate, the memory element coupled to the first transistor and the second transistor, wherein the content addressable memory cell comprises a minimum feature size F, and an area of between 18F2 and 36F2.