发明名称 Integrated circuit device and repair method thereof
摘要 The present disclosure provides integrated circuit (IC) devices and repair methods of the IC devices. An IC device includes a PMOS transistor including a substrate, a gate dielectric layer on the substrate, and a gate on the gate dielectric layer. The IC device also includes a repair circuit configured to apply a negative bias voltage to the substrate of the PMOS transistor, when the PMOS transistor is in an OFF state, to cause injections of electrons in the substrate into the gate dielectric layer to neutralize holes caused by negative bias temperature instability (NBTI) effect. The repair circuit is further configured to stop applying the negative bias voltage to the substrate of the PMOS transistor when the PMOS transistor is in an ON state. As such, the disclosed IC device repairs defect caused by NBTI effect in the PMOS transistor and prolongs the lifespan of the PMOS transistor.
申请公布号 US9508717(B2) 申请公布日期 2016.11.29
申请号 US201514797126 申请日期 2015.07.11
申请人 SEMICONDUCTOR MANUFACTURING INTERNATIONAL (SHANGHAI) CORPORATION 发明人 Gan Zhenghao
分类号 H03K19/003;H01L27/092 主分类号 H03K19/003
代理机构 Anova Law Group, PLLC 代理人 Anova Law Group, PLLC
主权项 1. An integrated circuit (IC) device, comprising: a PMOS transistor, including a substrate, a gate dielectric layer on the substrate, and a gate on the gate dielectric layer; and a repair circuit, including an NMOS transistor and configured to apply a negative bias voltage to the substrate of the PMOS transistor, when the PMOS transistor is in an OFF state, to cause injections of electrons in the substrate into the gate dielectric layer to neutralize holes caused by negative bias temperature instability (NBTI) effect, wherein: the repair circuit is further configured to stop applying the negative bias voltage to the substrate of the PMOS transistor when the PMOS transistor is in an ON state, and the NMOS transistor has a gate connecting to the gate of the PMOS transistor, has a source connecting to the substrate of the PMOS transistor, and has a drain configured to receive an input voltage having a negative value as a highest voltage level provided to the substrate of the PMOS transistor.
地址 Shanghai CN