发明名称 ETCH-RESISTANT WATER SOLUBLE MASK FOR HYBRID WAFER DICING USING LASER SCRIBING AND PLASMA ETCH
摘要 Methods of dicing semiconductor wafers, each wafer having a plurality of integrated circuits, are described. In an example, a method of dicing a semiconductor wafer including a plurality of integrated circuits includes forming a water soluble mask above the semiconductor wafer, the water soluble mask covering and protecting the integrated circuits. The method also includes baking the water soluble mask to increase the etch resistance of the water soluble mask. The method also includes, subsequent to baking the water soluble mask, patterning the water soluble mask with a laser scribing process to provide a water soluble patterned mask with gaps, exposing regions of the semiconductor wafer between the integrated circuits. The method also includes plasma etching the semiconductor wafer through the gaps in the water soluble patterned mask to singulate the integrated circuits.
申请公布号 US2016365283(A1) 申请公布日期 2016.12.15
申请号 US201514738389 申请日期 2015.06.12
申请人 Lei Wei-Sheng;Chowdhury Mohammad Kamruzzaman;Eaton Brad;Kumar Ajay 发明人 Lei Wei-Sheng;Chowdhury Mohammad Kamruzzaman;Eaton Brad;Kumar Ajay
分类号 H01L21/82;H01L21/308;H01J37/32;H01L21/02;H01L21/67;H01L21/3065;H01L21/268 主分类号 H01L21/82
代理机构 代理人
主权项 1. A method of dicing a semiconductor wafer comprising a plurality of integrated circuits, the method comprising: forming a water soluble mask above the semiconductor wafer, the water soluble mask covering and protecting the integrated circuits; subsequent to forming the water soluble mask, baking the water soluble mask to increase the etch resistance of the water soluble mask; subsequent to baking the water soluble mask, patterning the water soluble mask with a laser scribing process to provide a water soluble patterned mask with gaps, exposing regions of the semiconductor wafer between the integrated circuits; and plasma etching the semiconductor wafer through the gaps in the water soluble patterned mask to singulate the integrated circuits.
地址 San Jose CA US