Method and system to dynamically power-down a block of a pattern-recognition processor

摘要

A device includes a pattern-recognition processor. The pattern recognition processor includes blocks, such that each of the blocks include a plurality of feature cells configured to analyze at least a portion of data to be analyzed and to selectively provide a result of the analysis. The pattern recognition processor also includes block deactivation logic configured to dynamically power-down the block.

主权项

1. A device, comprising:
a pattern-recognition processor comprising:
blocks, each of the blocks comprising:
a plurality of feature cells configured to analyze at least a portion of data to be analyzed and to selectively provide a result of the analysis; andblock deactivation logic configured to determine whether any of the feature cells of the block are active and to dynamically power-down the block when the block deactivation logic determines that none of the feature cells of the block are active, wherein an activation-routing matrix selectively activates and deactivates the feature cells based on search terms in a search criterion.