Serial advanced technology attachment interfaces and methods for power management thereof

摘要

At least one example embodiment discloses a method of managing a power between a host serial advanced technology attachment (SATA) interface and a device SATA interface. The method includes first requesting to enter one of power saving states, defined by a SATA protocol, and second requesting to enter a deep power saving state if one of the host SATA interface and the device SATA interface operates at the first requested power saving state. The first requesting to enter one of power saving states and the second requesting to enter a deep power saving state are performed by one of the host SATA interface and the device SATA interface.

主权项

1. An interface circuit comprising:
a receiver configured to be connected to first differential signal lines and receive at least one of a first sleep signal, a second sleep signal and a wake request from an external device through the first differential signal lines; a transmitter configured to be connected to second differential signal lines and transmit a sleep response to the external device through the second differential signal lines in response to the first sleep signal or the second sleep signal; and at least one power segment configured to be connected to a sleep signal line and receive a third sleep signal from the external device through the sleep signal line, the sleep signal line being separate from the first differential signal lines and the second differential signal lines, wherein the interface circuit is configured to enter a first sleep mode and a second sleep mode in response to the first sleep signal and the second sleep signal, respectively, and to enter a third sleep mode in response to the third sleep signal, the interface circuit is configured to exit the third sleep mode in response to a negation of the third sleep signal and enter an active mode in response to the wake request, the transmitter is further configured to transmit a wake response to the external device through the second differential signal lines in response to the wake request, the interface circuit is configured to consume less power in the third sleep mode than the first sleep mode and the second sleep mode, the interface circuit is configured to consume less power in the second sleep mode than the first sleep mode, a time period to enter the active mode from the third sleep mode is greater than a time period to enter the active mode from the first sleep mode and the second sleep mode, a time period to enter the active mode from the third sleep mode is greater than a time period to enter the active mode from the second sleep mode, the interface circuit is configured to enter the third sleep mode when the interface circuit is in the first sleep mode in response to the third sleep signal, and the interface circuit is configured to enter the third sleep mode when interface circuit is in the second sleep mode in response to the third sleep signal.