Electromigration-aware layout generation

摘要

In some embodiments, in a method, cell layouts of a plurality of cells are received. For each cell, a respective constraint that affects a geometry of an interconnect to be coupled to an output pin of the cell in a design layout is determined based on a geometry of the output pin of the cell in the cell layout.

主权项

1. A method, performed by at least one processor, comprising:
receiving, by the at least one processor, cell layouts of a plurality of cells; and for each cell of the plurality of cells and with respect to each first geometric characteristic of a plurality of first geometric characteristics considered for a first interconnect coupled to an output pin of the cell in the cell layout,
obtaining, by the at least one processor, a respective relationship of a plurality of pairs of second geometric characteristic and output behaviors,
each second geometric characteristic and each output behavior of the plurality of pairs of second geometric characteristic and output behavior being considered for the first interconnect and being of the cell, respectively, andthe first geometric characteristic being orthogonal to each second geometric characteristic of the plurality of pairs of second geometric characteristic and output behavior;determining, by the at least one processor, respective electromigration susceptibility (EMS) of the first interconnect having the first geometric characteristic; anddetermining, by the at least one processor, a respective geometric constraint of the first interconnect using a first pair of second geometric characteristic and output behavior in the respective relationship,
the output behavior in the first pair of second geometric characteristic and output behavior causing the respective EMS of the first interconnect.