Fabrication of fully depleted field effect transistor with high-K gate dielectric in SOI technology

摘要

For fabricating a field effect transistor on a semiconductor substrate in SOI (semiconductor on insulator) technology, an insulating block comprised of insulating material is formed on a thin semiconductor island comprised of semiconductor material. Semiconductor material is further grown from sidewalls of the semiconductor island to extend up along sidewalls of the insulating block to form a raised drain structure on a first side of the insulating block and the semiconductor island and to form a raised source structure on a second side of the insulating block and the semiconductor island. A drain and source dopant is implanted into the raised drain and source structures. A thermal anneal is performed to activate the drain and source dopant within the raised drain and source structures and such that the drain and source dopant extends partially into the semiconductor island. Drain and source silicides are formed within the raised drain and source structures. The insulating block is etched away to form a block opening. A gate dielectric comprised of a high dielectric constant material is deposited at a bottom wall of the block opening after the thermal anneal and after formation of the drain and source silicides. The block opening is filled with a conductive material to form a gate structure disposed over the semiconductor island. The portion of the semiconductor island disposed under the gate structure forms a channel region that is fully depleted during operation of the field effect transistor. In this manner, the gate dielectric comprised of the high dielectric constant material is formed after any process step using a relatively high temperature of greater than about 750° Celsius to preserve the integrity of the gate dielectric comprised of a high-K dielectric material.