Semiconductor integrated circuit

摘要

A low side control circuit and a high side control circuit are disposed in first and second n type well regions, respectively. A third n− type well region is formed around the second n type well region. The first n− type well region is formed outside the second n− type well region. A p type well region is formed around the third n− type well region. The third n− type well region and the p type well region constitute an HVJT between the first and second n type well regions. A p+ type contact region and a first electrode supplied with GND potential are formed in the p type well region. In the p type well region, an n+ type contact region and a second electrode supplied with L-VDD potential higher than the GND potential are formed between the HVJT and the p+ type contact region.

主权项

1. A semiconductor integrated circuit comprising:
a first-conductivity-type semiconductor substrate; a first second-conductivity-type well region formed in one main surface side of the first-conductivity-type semiconductor substrate; a second second-conductivity-type well region formed in the one main surface side of the substrate and separately from the first second-conductivity-type well region; a first circuit formed in the first second-conductivity-type well region and supplied with a second potential higher than a first potential, the second potential being supplied from a first low voltage power supply using the first potential as a reference; a second circuit formed in the second second-conductivity-type well region and supplied with a fourth potential higher than a third potential, the fourth potential being supplied from a second low voltage power supply using the third potential as a reference; a first-conductivity-type well region formed adjacent to and around the second second-conductivity-type well region and adjacent to the substrate; a first-conductivity-type semiconductor region selectively formed in the first-conductivity-type well region; a first electrode supplied with the first potential and connected to the first-conductivity-type semiconductor region; a second-conductivity-type semiconductor region selectively formed in the first-conductivity-type well region and separately from the first-conductivity-type semiconductor region, nearer to the second second-conductivity-type well region than to the first-conductivity-type semiconductor region; and a second electrode supplied with the second potential and connected to the second-conductivity-type semiconductor region.