发明名称 |
MULTIPROCESSOR TASK SCHEDULING SYSTEM |
摘要 |
MULTIPROCESSOR TASK SCHEDULING SYSTEM A task status word (TSW) is created for each task indicating, the instant location of the task, its priority and a record of synchronizing signals. Task status words are accessible from an addressable memory section for delivery to a TSW register. From the TSW register, a selected TSW effects control functions to synchronize tasks in different processors or computational units as well as input-output processors. A physical memory manager locates TSWs in response to signals, then checks the location of the task and the nature of the signal to determine signal routing to a processor. If a task is not in a processor, an interrupt manager resolves priority and signal significance indicated by the TSW to determine an interrupt.
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申请公布号 |
CA1323438(C) |
申请公布日期 |
1993.10.19 |
申请号 |
CA19890610111 |
申请日期 |
1989.09.01 |
申请人 |
EVANS & SUTHERLAND COMPUTER CORP. |
发明人 |
DULONG, CAROLE;LECLERC, JEAN-YVES;SCAGLIA, PATRICK |
分类号 |
G06F15/16;G06F9/48;G06F15/177;(IPC1-7):G06F9/46 |
主分类号 |
G06F15/16 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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