| 摘要 |
A multiplier circuit includes a bias circuit which outputs a reference voltage and a bias signal, a first delay circuit which inputs an input signal and outputs a first delayed signal according to the reference voltage and the bias signal, a second delay circuit which inputs an inversed input signal and outputs a second delay signal according to the reference voltage and the bias signal, and an OR circuit which outputs an OR logic result generated responsive to the first and second delayed signals.
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