发明名称 MECHANISM TO PRECLUDE LOAD REPLAYS DEPENDENT ON OFF-DIE CONTROL ELEMENT ACCESS IN AN OUT-OF-ORDER PROCESSOR
摘要 An apparatus including first and second reservation stations. The first reservation station dispatches a load micro instruction, and indicates on a hold bus if the load micro instruction is a specified load micro instruction directed to retrieve an operand from a prescribed resource other than on-core cache memory. The second reservation station is coupled to the hold bus, and dispatches one or more younger micro instructions therein that depend on the load micro instruction for execution after a number of clock cycles following dispatch of the first load micro instruction, and if it is indicated on the hold bus that the load micro instruction is the specified load micro instruction, the second reservation station is configured to stall dispatch of the one or more younger micro instructions until the load micro instruction has retrieved the operand. The plurality of non-core resources includes a control element, coupled to the out-of order processor via a control bus.
申请公布号 EP3032405(A3) 申请公布日期 2016.07.06
申请号 EP20150196896 申请日期 2015.11.27
申请人 VIA ALLIANCE SEMICONDUCTOR CO., LTD. 发明人 COL, GERARD;EDDY, COLIN;HENRY, G. GLENN
分类号 G06F9/38;G06F9/30 主分类号 G06F9/38
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