Shielded coplanar line

摘要

In one embodiment there is disclosed a method for manufacturing an integrated circuit in a semiconductor substrate including through vias and a coplanar line, including the steps of: forming active components and a set of front metallization levels; simultaneously etching from the rear surface of the substrate a through via hole and a trench crossing the substrate through at least 50% of its height; coating with a conductive material the walls and the bottom of the hole and of the trench; and filling the hole and the trench with an insulating filling material; and forming a coplanar line extending on the rear surface of the substrate, in front of the trench and parallel thereto, so that the lateral conductors of the coplanar line are electrically connected to the conductive material coating the walls of the trench.

主权项

1. A method, comprising:
forming active components in a front surface of a semiconductor substrate having a thickness; forming, on the front surface of the semiconductor substrate, a set of front metallization levels that includes insulating portions and conductive portions formed in the insulating portions; forming a first hole and a second hole in a rear surface of the substrate, each of the first and second holes extending into the substrate through at least 50% of the substrate's thickness and forming respective walls and a bottom; covering the respective walls and bottoms with conductive material; filling the first and second holes with an insulating material; and forming a coplanar line configured to convey radio frequency signals over the rear surface of the substrate, the coplanar line having a central conductor facing the second hole and lateral conductors that are located on opposing sides of the central conductor and that are electrically coupled to the conductive material coating the walls of the second hole.