发明名称 Memory device, writing method, and reading method
摘要 A memory device includes a memory cell which has one cell selection section and a storage section which is connected in series with respect to the cell selection section and which is selected as an access target for writing or reading by the cell selection section, in which the storage section is provided with a plurality of memory elements which are able to be written one time only and where information is held by changing resistance values in a non-written state and a written state.
申请公布号 US9478307(B2) 申请公布日期 2016.10.25
申请号 US201414483669 申请日期 2014.09.11
申请人 Sony Semiconductor Solutions Corporation 发明人 Yanagisawa Yuki
分类号 G11C17/12;G11C17/16;G11C11/56;G11C17/18 主分类号 G11C17/12
代理机构 Michael Best & Friedrich LLP 代理人 Michael Best & Friedrich LLP
主权项 1. A memory device comprising: a memory cell which has one cell selection section and a storage section which is connected in series with respect to the cell selection section and which is selected as an access target for writing or reading by the cell selection section, wherein the storage section is provided with a plurality of memory elements which are able to be written one time only and where information is held by changing resistance values in a non-written state and a written state, wherein the plurality of memory elements in the storage section are connected with each other in series, and all or some of the plurality of memory elements are configured such that it is possible to control conductivity or non-conductivity in a non-written state, wherein the plurality of memory elements which are connected with each other in series in the storage section are each formed with a transistor structure, and each of the memory elements is formed such that on resistances in a non-written state are resistance values which are different from each other due to gate lengths, densities of each of the semiconductor layers, and gate oxide film thicknesses being different from each other.
地址 Atsugi-Shi JP