INSULATED GATE TYPE SEMICONDUCTOR DEVICE MANUFACTURING METHOD AND INSULATED GATE TYPE SEMICONDUCTOR DEVICE

摘要

A technique disclosed herein improves a voltage resistance of an insulated gate type semiconductor device. A provided method is a method for manufacturing an insulated gate type switching device configured to switch between a front surface electrode and a rear surface electrode. The method includes implanting a first kind of second conductivity type impurities to bottom surfaces of gate trenches and diffusing the implanted first kind of second conductivity type impurities, and implanting a second kind of second conductivity type impurities to the bottom surfaces of the circumferential trenches and diffusing the implanted second kind of second conductivity type impurities.

主权项

1. A method for manufacturing an insulated gate type semiconductor device that comprises:
a semiconductor substrate; a front surface electrode provided on a front surface of the semiconductor substrate; and a rear surface electrode provided on a rear surface of the semiconductor substrate, wherein the insulated gate type semiconductor device is configured to switch between the front surface electrode and the rear surface electrode, the insulated gate type semiconductor device comprises: a first region of a first conductivity type connected to the front surface electrode; a second region of a second conductivity type being in contact with the first region; a third region of the first conductivity type separated from the first region by the second region; a plurality of gate trenches provided in the front surface of the semiconductor substrate and penetrating the second region to reach the third region; gate insulating films and gate electrodes provided in the gate trenches; fourth regions of the second conductivity type provided in ranges exposed on bottom surfaces of the gate trenches; a plurality of circumferential trenches provided in the front surface of the semiconductor substrate in a region outside the second region; insulating layers provided in the circumferential trenches; and fifth regions of the second conductivity type provided in ranges exposed on bottom surfaces of the circumferential trenches, the method comprising: forming the gate trenches; forming the circumferential trenches; forming the fourth regions by implanting a first kind of second conductivity type impurities to the bottom surfaces of the gate trenches and diffusing the implanted first kind of second conductivity type impurities; and forming the fifth regions by implanting a second kind of second conductivity type impurities to the bottom surfaces of the circumferential trenches and diffusing the implanted second kind of second conductivity type impurities, wherein a diffusion coefficient of the second kind of second conductivity type impurities in the formation of the fifth regions is larger than a diffusion coefficient of the first kind of second conductivity type impurities in the formation of the fourth regions.