FAST EXIT FROM DRAM SELF-REFRESH

摘要

Embodiments of the invention describe a dynamic random access memory (DRAM) device that may abort a self-refresh mode to improve the exit time from a DRAM low power state of self-refresh. During execution of a self-refresh mode, the DRAM device may receive a signal (e.g., a device enable signal) from a memory controller operatively coupled to the DRAM device. The DRAM device may abort the self-refresh mode in response to receiving the signal from the memory controller.

主权项

1. A system comprising:
a dynamic random access memory (DRAM) device to execute a self-refresh mode comprising a plurality of commands, each command to refresh rows of the DRAM device; and a memory controller operatively coupled to the DRAM device to send a signal to the DRAM device; the DRAM device, in response to receiving the signal from the memory controller, to further abort the self-refresh mode.