发明名称 Semiconductor device and method for fabricating the same
摘要 A semiconductor device and a method of forming the same, the semiconductor device includes a substrate, a plurality of fin shaped structures and an insulating layer. The substrate has a fin field-effect transistor (finFET) region, a first region, a second region and a third region. The first region, the second region and the third region have a first surface, a second surface, and a third surface, respectively, where the first surface is relatively higher than the second surface and the second surface is relatively higher than the third surface. The fin shaped structures are disposed on a surface of the fin field-effect transistor region. The insulating layer covers the first surface, the second surface and the third surface.
申请公布号 US9406521(B1) 申请公布日期 2016.08.02
申请号 US201514793692 申请日期 2015.07.07
申请人 UNITED MICROELECTRONICS CORP. 发明人 Liou En-Chiuan;Tung Yu-Cheng
分类号 H01L29/78;H01L21/308;H01L27/088;H01L21/84;H01L29/06;H01L29/66 主分类号 H01L29/78
代理机构 代理人 Hsu Winston;Margo Scott
主权项 1. A semiconductor device, comprising: a substrate, having a fin field effect transistor (finFET) region, a first region, a second region and a third region, the first region and the second region having a first surface and a second surface respectively and the third region having a third surface, wherein the first surface is relatively higher than the second surface and the second surface is relatively higher than the third surface; a plurality of fin shaped structures, disposed on a surface of the finFET region, wherein the second region is extended in a direction perpendicular to an extending direction of the fin shaped structures, and has a length at least two times greater than a pitch of the fin shaped structures; and an insulating layer, covering the first surface, the second surface, the third surface, and a bottom portion of the fin shaped structures, to form a first shallow trench isolation (STI) in the first region, a second STI in the second region, a third STI in the third region and a fourth STI in the finFET region, wherein the first STI, the second STI and the third STI have different depths.
地址 Hsin-Chu TW
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