Integrated multiple gate length semiconductor device including self-aligned contacts

摘要

A multi-channel semiconductor device includes a first and second gate channels formed in a semiconductor substrate. The first gate channel has a first length and the second gate channel has a second length greater than the first length. A gate dielectric layer is formed in the first and second gate channels. A first plurality of work function metal layers is formed on the gate dielectric layer of the first gate channel. A second plurality of work function metal layers is formed on the gate dielectric layer of the second gate channel. A barrier layer is formed on each of the first and second plurality of work function metal layers, and the gate dielectric layer. The multi-channel semiconductor device further includes metal gate stacks formed on of the barrier layer such that the barrier layer is interposed between the metal gate stacks and the gate dielectric layer.

主权项

1. A multi-channel semiconductor device, comprising:
a first gate channel formed in a semiconductor substrate and a second gate channel formed in the semiconductor substrate, the first gate channel having a first length and the second gate channel having a second length greater than the first length; a gate dielectric layer formed in the first gate channel and the second gate channel; a first plurality of work function metal layers formed on the gate dielectric layer of the first gate channel and a second plurality of work function metal layers formed on the gate dielectric layer of the second gate channel, the second plurality of work function metal layers including a portion of the first plurality of work function metal layers such that the second plurality of work function metal layers has a greater number of layers than the first plurality of work function metal layers; a barrier layer formed on each of the first plurality of work function metal layers, the second plurality of work function metal layers and the gate dielectric layer, the second plurality of work function metal layers comprising:
a first work function metal layer formed directly on the gate dielectric layer,a second work function metal layer formed on the first work function metal layer,a third work function metal layer formed on the second work function metal layer, anda fourth work function metal layer formed on the third work function metal layer; and metal gate stacks formed on the barrier layer in each of the first gate channel and the second gate channel, the barrier layer being interposed between the metal gate stacks and the gate dielectric layer.