发明名称 Class-D amplifier circuits
摘要 Methods and apparatus for Class-D amplifier circuits with improved power efficiency. The circuit has an output stage with at least first and second switches and a modulator that receives an input signal to be amplified, SIN, and a first clock signal fSW. The modulator controls the duty cycles of the first and second switches, within a switching cycle based on the input signal, wherein the switching cycle has a switching frequency based on the first clock signal. A frequency controller controls the frequency of the first clock signal in response to an indication of the amplitude of the input signal so as to provide a first switching frequency at a first input signal amplitude and a second, lower, switching frequency at a second, lower, input signal amplitude. A lower switching frequency can be tolerated at low signal amplitudes and varying the switching frequency in this way thus maintains stability whilst reducing switching power losses.
申请公布号 US9473087(B2) 申请公布日期 2016.10.18
申请号 US201414521191 申请日期 2014.10.22
申请人 Cirrus Logic, Inc. 发明人 Lesso John Paul;Ido Toru
分类号 H03F3/38;H03F3/217;H03F1/02 主分类号 H03F3/38
代理机构 Blank Rome LLP 代理人 Blank Rome LLP
主权项 1. A Class-D amplifier circuit for amplifying an input signal comprising: an output stage comprising at least first and second switches; a modulator comprising a signal input for receiving said input signal and a clock input for receiving a first clock signal, the modulator being configured to control the duty cycles of said first and second switches within a switching cycle based on said input signal, wherein said switching cycle has a switching frequency based on said first clock signal; and a frequency controller for controlling the frequency of said first clock signal in response to an indication of the amplitude of the input signal so as to provide a first switching frequency at a first input signal amplitude and a second, lower, switching frequency at a second, lower, input signal amplitude; wherein said modulator comprises a reference waveform generator for generating a reference waveform at a frequency based on said first clock signal; wherein said reference waveform generator is configured such that the amplitude of the reference waveform is substantially the same at said first and second switching frequencies; and wherein said frequency controller is configured to generate a gain control signal indicating any changes in said switching frequency and the reference waveform generator is configured to receive the gain control signal and adjust a slope of the reference waveform based on said gain control signal to compensate for any change in switching frequency.
地址 Austin TX US