A DECODING CIRCUIT RECEIVING ADDRESS SIGNALS OF A MEMORY DEVICE

摘要

A decoding circuit is provided to solve the problem of erroneous operations by setting CL and tWR regardless of applied address signals. The first NOR gate receives address signals(A6,A5) and, NAND gate receives address signal(A6,A4). The first inverter inverts an output of the NAND gate, and the second NOR gate receives the output of the first NOR gate and the output of the first inverter. The second inverter inverts the output of the second NOR gate to set the value of CL 5 when the address signal are(0,0,0),(0,0,1),(1,0,1),(1,1,1).