| 摘要 |
There is provided a structure wherein an emitter layer 3 is provided in the region A on the first major surface side of a semiconductor substrate 1 , and emitter layer 3 is not provided in the region b. There is provided a structure wherein a collector P layer 5 is provided in the region A on the second major surface side of a semiconductor substrate 1 , and a cathode N layer 4 is provided in the region B. Specifically, there is provided a structure wherein IGBTs are composed in the region A, and diodes are composed in the region B. By the above-described structure, ON characteristics when the gate is turned on can be improved while suppressing the elevation of the forward voltage Vf and the recovery current of the diodes.
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