发明名称 DESIGN PATTERN CORRECTING METHOD, DESIGN PATTERN FORMING METHOD, PROCESS PROXIMITY EFFECT CORRECTING METHOD, SEMICONDUCTOR DEVICE AND DESIGN PATTERN CORRECTING PROGRAM
摘要 A design pattern correcting method of correcting a design pattern in relation to a minute step of the design pattern, is disclosed, which comprises extracting at least one of two edges extended from a vertex of the design pattern, measuring a length of the extracted edge, determining whether or not the length of the measured edge is shorter than a predetermined value, extracting two vertexes connected to the extracted edge if it is determined that the length of the extracted edge is shorter than the predetermined value, and reshaping the design pattern to match positions of the two extracted vertexes with each other.
申请公布号 US2009077530(A1) 申请公布日期 2009.03.19
申请号 US20080269705 申请日期 2008.11.12
申请人 KABUSHIKI KAISHA TOSHIBA 发明人 KOTANI TOSHIYA;NOJIMA SHIGEKI;MAEDA SHIMON
分类号 G06F17/50;G03C5/00;G03F1/36;G03F1/68;G03F9/00;H01L21/027 主分类号 G06F17/50
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