Instruction predication using unused datapath facilities

摘要

A method and circuit arrangement for selectively predicating an instruction in an instruction stream based upon a value corresponding to a predication register address indicated by a portion of an operand associated with the instruction. A first compare instruction in an instruction stream stores a compare result in at a register address of a predication register. The register address of the predication register is stored in a portion of an operand associated with a second instruction, and during decoding the second instruction, the predication register is accessed to determine a value stored at the register address of the predication register, and the second instruction is selectively predicated based on the value stored at the register address of the predication register.

主权项

1. A method of executing instructions in an instruction stream in a processor, the method comprising:
executing a first compare instruction to generate a compare result and setting a value corresponding to a register address of a predication register based on the compare result; for a second instruction that addresses an operand stored in a register file, analyzing a portion of the operand stored in the register file to determine the register address of the predication register; selectively predicating the second instruction based at least in part on the value corresponding to the register address of the predication register to generate predicated result data, wherein the predicated result data includes the portion of the operand associated with the second instruction; analyzing a portion of an operand associated with a third instruction in the instruction stream to determine the register address of the predication register, wherein the operand of the third instruction is the predicated result data of the second instruction; and selectively predicating the third instruction based at least in part on the value corresponding to the register address of the predication register.