发明名称 Semiconductor device and its quality management method
摘要 A semiconductor device capable of easily and properly detecting a defective element unit(s) and a quality management method for the semiconductor device are suggested. A semiconducting device simulating interactions between nodes in an interaction model is equipped with a quality management unit for managing the quality of each element unit provided corresponding to each node, wherein the quality management unit executes a specified quality test of each element unit, compares test results of the quality test with pre-given results to be obtained from the quality test, and detects a defective memory cell(s) and a defective element unit(s) based on the comparison results.
申请公布号 US9472306(B2) 申请公布日期 2016.10.18
申请号 US201514644906 申请日期 2015.03.11
申请人 Hitachi, Ltd. 发明人 Yamaoka Masanao;Ono Goichi;Yoshimura Chihiro;Hayashi Masato
分类号 G06F17/50;G11C29/08;G11C29/00;G06N7/00;G06N99/00 主分类号 G06F17/50
代理机构 Foley & Lardner LLP 代理人 Foley & Lardner LLP
主权项 1. A semiconductor device simulating interactions between nodes in an interaction model, the semiconductor device comprising: a plurality of element units, each of which is provided corresponding to each of the nodes constituting the interaction model; and a quality management unit that manages quality of each of the element units; wherein each element unit includes: a first memory cell that retains a value indicating a state of the node associated with the element unit;one or more second memory cells, each of which retains each interaction coefficient with each of the other nodes causing an interaction with a relevant node; anda logical circuit that determines a value indicating a next state of the node associated with the element unit based on the interaction coefficient retained in each of the second memory cells and a value which is given from each of the other corresponding element units and indicates the state of each of the other nodes causing an interaction over the node associated with the element unit;wherein the quality management unit: executes a specified quality test for each of the element units;compares test results of the quality test with pre-given results to be obtained from the quality test; anddetects, based on comparison results, a defective memory cell among the first or second memory cells, and a defective element unit, wherein the element unit includes a third memory cell which is redundant; wherein the quality management unit sends first information regarding a defective second memory cell detected in the quality test to the element unit including the second memory cell, wherein the element unit which has received the first information switches a corresponding relationship between the second and third memory cells and a value, which is given from each of the other corresponding unit elements and indicates the state of each of the other nodes causing the interaction over the node associated with the relevant element unit, based on the first information in order to use the third memory cell instead of the defective second memory cell.
地址 Tokyo JP