发明名称 |
INFORMATION PROCESSING APPARATUS, MEMORY CONTROLLER, AND MEMORY CONTROL METHOD |
摘要 |
An information processing apparatus includes: a memory device configured to store data; an arithmetic processor configured to issue a request to be transmitted to the memory device; and a memory controller including: a buffer configured to store one or more unselected requests that are issued by the arithmetic processing processor and are not selected; a history register configured to hold one or more addresses for one or more transmitted requests that have been transmitted to the memory device; and a selection unit configured to select, from the one or more unselected requests stored in the buffer, a target request to be transmitted to the memory device based on the one or more addresses stored in the history register and transmit the target request to the memory device. |
申请公布号 |
US2016342541(A1) |
申请公布日期 |
2016.11.24 |
申请号 |
US201615095203 |
申请日期 |
2016.04.11 |
申请人 |
FUJITSU LIMITED |
发明人 |
Tokoyoda Akio;Aihara Masatoshi;Takayama Koichiro;Hosoe Koji |
分类号 |
G06F13/16 |
主分类号 |
G06F13/16 |
代理机构 |
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代理人 |
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主权项 |
1. An information processing apparatus comprising:
a memory device configured to store data; an arithmetic processor configured to issue a request to be transmitted to the memory device; and a memory controller including: a buffer configured to store one or more unselected requests that are issued by the arithmetic processing processor and are not selected; a history register configured to hold one or more addresses for one or more transmitted requests that have been transmitted to the memory device; and a selection unit configured to select, from the one or more unselected requests stored in the buffer, a target request to be transmitted to the memory device based on the one or more addresses stored in the history register and transmit the target request to the memory device. |
地址 |
Kawasaki-shi JP |