发明名称 Signal analysis circuit and signal analysis method thereof
摘要 A signal analysis circuit and a signal analysis method thereof are disclosed. The signal analysis circuit includes a peak detector, a subtraction amplifying unit, and a compare unit. The peak detector obtains a peak value of a first voltage signal to generate a second voltage signal. The subtraction amplifying unit generates a compare voltage signal according to the second voltage signal, and amplifies a voltage value difference between the second voltage signal and the compare voltage signal to generate a third voltage signal. A peak-to-peak value of the third voltage signal is larger than a peak-to-peak value of the second voltage signal. The compare unit compares the voltage value of the third voltage signal and the voltage value of the compare voltage signal to generate an output voltage signal. In such a manner, a new signal analysis circuit can be realized.
申请公布号 US9529023(B2) 申请公布日期 2016.12.27
申请号 US201514961905 申请日期 2015.12.08
申请人 ASUSTeK COMPUTER INC. 发明人 Tu Wei-Chen;Huang Yi-Ming;Tsai Ming-Ting;Hung Hsiang-Jui
分类号 H03K5/153;G01R19/04 主分类号 H03K5/153
代理机构 CKC & Partners Co., Ltd. 代理人 CKC & Partners Co., Ltd.
主权项 1. A signal analysis circuit, comprising: a peak detector configured to receive a first voltage signal and obtain a peak value of the first voltage signal to generate a second voltage signal; a subtraction amplifying unit configured to generate a compare voltage signal according to the second voltage signal, and amplifying a voltage value difference between the second voltage signal and the compare voltage signal to generate a third voltage signal, wherein a peak-to-peak value of the third voltage signal is larger than a peak-to-peak value of the second voltage signal; and a compare unit electrically connected to the subtraction amplifying unit and configured to compare a voltage value of the third voltage signal and a voltage value of the compare voltage signal to generate an output voltage signal.
地址 Taipei TW