发明名称 CIRCUIT SHARED ERROR CORRECTION CODE PROCESSING CIRCUIT
摘要 PURPOSE:To reduce circuitry by sharing an exclusive OR gate between coders generating plural different error correction codes, thereby eliminating redundant part of the circuit. CONSTITUTION:When the processing circuit is used for an extended Humming, coder, a switch S1 is thrown to the position of ground by a control signal SEN and a 0-level appears at an output. Information bit signals D2-D5 are received and check bits P11, P21, P31, P41 are generated by exclusive OR gates E5, E7, E9, E11. When the processing circuit is used for a BCH coder, the switch S1 is thrown to the position of an information bit signal D3 and the signal D3 appears at the output. Then a check bit signal P12 is generated by exclusive OR gates E1, E5, E13, E17 and a check bit signal 22 is generated by exclusive OR gates E2, E7, E13 and then one coder is used to use respective exclusive OR gates E1-E8 in common, from which check bit signals P11-P44 are generated.
申请公布号 JPH0799454(A) 申请公布日期 1995.04.11
申请号 JP19930241408 申请日期 1993.09.28
申请人 SHARP CORP 发明人 ARIMA TAKAAKI
分类号 G06F11/10;H03M13/00;H04J3/00 主分类号 G06F11/10
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