发明名称 Method of forming power semiconductor devices with controllable integrated buffer
摘要 A method of manufacturing a semiconductor device and device in which a sacrificial N shelf layer is grown on a P+ semiconductor substrate to contain the out-diffusion of dopant from the substrate. An N+ buffer layer is grown on the N shelf layer and an N- epitaxial layer is grown on the N+ buffer layer. The presence of the N shelf layer, which is consumed by the substrate dopant during further device fabrication, allows the integrated dopant level of the N+ buffer layer to be accurately controlled in the finished device.
申请公布号 US5872028(A) 申请公布日期 1999.02.16
申请号 US19960708712 申请日期 1996.09.05
申请人 HARRIS CORPORATION 发明人 YEDINAK, JOSEPH ANDREW;BHALLA, ANUP;WEBSTER, JEFFREY ALLEN;CUMBO, JOSEPH LEONARD
分类号 H01L29/78;H01L21/22;H01L21/331;H01L21/336;H01L29/739;(IPC1-7):H01L21/332 主分类号 H01L29/78
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