发明名称 Virtuel to physical memory address mapping within a system having a secure domain and a non-secure domain
摘要 There is provided apparatus for processing data, said apparatus comprising: a processor operable in a plurality of modes and either a secure domain or a non-secure domain including: at least one secure mode being a mode in said secure domain; and at least one non-secure mode being a mode in said non-secure domain; wherein when said processor is executing a program in a secure mode said program has access to secure data which is not accessible when said processor is operating in a non-secure mode; said processor includes a non-secure translation table base address register operable in said non-secure domain to indicate a region of memory storing non-secure domain memory mapping data defining how virtual addresses are translated to physical addresses within said non-secure domain; and said processor includes a secure translation table base address register operable in said secure domain to indicate a region of memory storing secure domain memory mapping data defining how virtual addresses are translated to physical addresses within said secure domain.
申请公布号 GB2409745(A) 申请公布日期 2005.07.06
申请号 GB20050005840 申请日期 2003.10.27
申请人 * ARM LIMITED 发明人 SIMON CHARLES * WATT;CHRISTOPHER BENTLEY * DORNAN;LUC * ORION;NICOLAS * CHAUSSADE;LIONEL * BELNET;STEPHANE ERIC SEBASTIEN * BROCHIER;DAVID HENNAH * MANSELL;MICHAEL ROBERT * NONWEILER
分类号 G01R31/00;G06F9/46;G06F9/48;G06F12/00;G06F12/02;G06F12/08;G06F12/10;G06F12/14;(IPC1-7):G06F9/46 主分类号 G01R31/00
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