Semiconductor memory devices and operating methods that are configured to output data bits at a lower rate in a test mode of operation,申请号KR20040037685-传众专利搜索

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发明名称	Semiconductor memory devices and operating methods that are configured to output data bits at a lower rate in a test mode of operation
摘要
申请公布号	KR100618828(B1)	申请公布日期	2006.08.31
申请号	KR20040037685	申请日期	2004.05.27
申请人		发明人
分类号	G01R31/28;G11C7/10;G11C7/22;G11C11/40;G11C11/401;G11C11/407;G11C11/409;G11C29/00;G11C29/14	主分类号	G01R31/28
代理机构		代理人
主权项
地址

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