Yield enhancing vertical redundancy method for 3D wafer level packaged (WLP) integrated circuit systems

摘要

A three-dimensional wafer level packaged (WLP) integrated circuit that includes a pair of opposing circuit cells fabricated on separate wafers that have been bonded together to provide vertical circuit redundancy. The integrated circuits on each of the separate wafers are performance tested prior to the wafers being bonded together so as to designate good performing circuits as active circuit cells and poor performing circuits as inactive circuit cells. The inactive circuit cell for a particular pair of integrated circuits is metalized with a short circuiting metal layer to make it inoperable. The WLP integrated circuit implements a yield-enhancing circuit redundancy scheme on spatially uncorrelated wafers that avoids wasting valuable wafer x-y planar area, which provides cost savings as a result of more wafer area being available for distinct circuits on each wafer rather than sacrificed for traditional side-by-side redundant copies of circuits.

主权项

1. A wafer level package comprising:
a first wafer substrate including a first surface and a second surface; a second wafer substrate including a first surface and a second surface, said first wafer substrate being bonded to the second wafer substrate and defining a cavity therebetween; at least one intercavity interconnect (ICIC) extending across the cavity and being electrically coupled to at least one via extending through the first wafer substrate or the second wafer substrate; a first integrated circuit fabricated on the second surface of the first substrate and positioned within the cavity; a second integrated circuit fabricated on the first surface of the second substrate and positioned within the cavity where one of the first and second integrated circuits is designated as an active circuit and the other of the first and second integrated circuits is designated as an inactive circuit; and a metal blanket layer deposited over the inactive circuit so as to make the inactive circuit inoperable.