Cell boundary layout

摘要

Some embodiments relate to a method of hierarchical layout design, comprising forming a layout of an integrated circuit (IC) according to a design rule that specifies a minimum design rule distance between a neighboring layout features within the IC. Forming the layout comprises forming first and second standard cells having first and second layout features, respectively, that about one-another so that a distance between the first and second layout features is less than the minimum design rule distance. The method further comprises configuring design rule checking (DRC) to ignore this fail. Instead, the layout is modified with an automated layout tool by merging the first and second layout features, or by removing a portion of the first or second layout feature to increase the distance between the first and second layout features to be greater than or equal to the minimum distance.

主权项

1. A method, comprising:
using an electronic design automation (EDA) design window displayed on a monitor to create a graphical representation used to form an integrated circuit (IC); forming first and second standard cells within the graphical representation, which respectively have first and second layout features, wherein the first and second standard cells abut along a cell boundary so that the first and second layout features are separated over the cell boundary by a non-zero distance that is less than a minimum distance defined by a design rule; and automatically modifying the first and second layout features by merging the first and second layout features to extend over the cell boundary so that the first and second layout features are not separated by a distance that is less than the minimum distance.