| 摘要 |
Corrective memory in which defective cells of a memory to be corrected are displayed MC (62). It is used for a direct display technique for speed and simplification of the support circuits. The capacity of the corrective memory depends on the average expected number of defective cells of the memory to be corrected and circuit surface is saved compared to the existing memory correction techniques. It consists of one or more corrective memory banks (63), with words that contain suitably formed signaling indices (flag) (66), of paging (tag) (65) and a section of word (pos) (70) that guide to circuits of comparison and allowing (67), circuits of section selection (71) and a multiplexing circuit (73). In case of selection of defective word or asection of word of the MC, the multiplexing circuit allows for the connection of a corrective memory bank to the data channel that undertakes the replacement of the defective word or a section of word of the MC. |
