发明名称 |
SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF THE SAME |
摘要 |
PROBLEM TO BE SOLVED: To set a withstand voltage at a level of reducing to a degree causing no problems for practical use or blocking a punch-through current between neighboring wells to reduce an area required by well isolation.SOLUTION: A semiconductor device 30 includes a high-concentration deep P region 33 provided in a deep layer of a P-type substrate 31 between neighboring deep N wells 32a and 32b to improve a withstand voltage between the neighboring deep N wells 32a and 32b. By doing this, a punch-through current passing through the P-type substrate 31 between the neighboring deep N wells 32a and 32b, and a punch-through current passing through a deep layer of the P-type substrate 31 between neighboring N wells 34a and 34b in a surface layer can be reduced to a large extent or blocked.SELECTED DRAWING: Figure 1 |
申请公布号 |
JP2016111096(A) |
申请公布日期 |
2016.06.20 |
申请号 |
JP20140245260 |
申请日期 |
2014.12.03 |
申请人 |
NATIONAL INSTITUTE OF ADVANCED INDUSTRIAL SCIENCE AND TECHNOLOGY |
发明人 |
OGASAWARA YASUHIRO;SEKIKAWA TOSHIHIRO;KOIKE HANPEI |
分类号 |
H01L21/761;H01L21/265;H01L21/266 |
主分类号 |
H01L21/761 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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