发明名称 Matchline retention for mitigating search and write conflict
摘要 Systems and methods relate to a matchline receiver of a content-addressable memory (CAM). A matchline of the CAM, which provides a hit/miss indication for a search operation of a data word is provided to the matchline receiver. The matchline receiver comprises a retention circuit to provide a hit/miss output, wherein the retention circuit retains, at the hit/miss output, the hit/miss indication provided by the matchline during a first clock phase of a clock, even if the hit/miss indication provided by the matchline is modified by a write operation or an invalidation operation during the first clock phase.
申请公布号 US9396794(B1) 申请公布日期 2016.07.19
申请号 US201514827235 申请日期 2015.08.14
申请人 QUALCOMM Incorporated 发明人 Nadkarni Rahul;Garg Manish
分类号 G11C15/00;G11C15/04;G11C11/419 主分类号 G11C15/00
代理机构 Muncy, Geissler, Olds & Lowe, P.C. 代理人 Muncy, Geissler, Olds & Lowe, P.C.
主权项 1. An apparatus comprising: a matchline receiver configured to receive a matchline of a content-addressable memory (CAM), wherein the matchline is configured to provide a hit/miss indication for a search operation of a data word of the CAM corresponding to the matchline; wherein the matchline receiver comprises a retention circuit configured to retain, on a hit/miss output, the hit/miss indication provided by the matchline during a first clock phase of a clock, even if the matchline is modified during the first clock phase.
地址 San Diego CA US