| 摘要 |
PURPOSE:To simultaneously execute writing and reading operation by reducing a chip area. CONSTITUTION:A memory cell array consists of memory cells arranged in 10 rows and 100 columns, and a write bit line WB and a read bit line RB are provided at every row, and a write word line WW and a read word line RW are provided at every column. At the time of reading data in every column, charge is performed by that a MOSFET 38 for charge is turned on, and thereafter, one read word line RW is selected and the data in the memory cells on one row are read on the read bit line RB. At the time of writing the data in every column, all write bit lines WB are discharged by that the MOSFET 40 for discharge is turned on, and thereafter, one write word line WW is selected. Then, the data are sent successively at every write bit line WB, and data write in the column is performed. |
