发明名称 ASYNCHRONOUS DIGITAL DATA CAPTURE
摘要 PROBLEM TO BE SOLVED: To reduce time and cost until the productization of automatic product testing solutions, by abolishing needs for special design of special hardwares, mounting and maintenance. SOLUTION: First, digital outputs of a device under test (DUT) clock are captured on an automated test equipment (ATE: Automated Test Equipment) digital channel. Secondly, NRZ output data of DUT is captured, while the clock signals are captured on a neighboring ATE channel. Thirdly, the digital clock signal is analyzed so that the frequency spectrum can be produced. From the spectrum frequency and phase of the clock are calculated. From the clock frequency, the number of device cycles captured is decided. From the phase of the clock the, data captured is compared with the clock data in order to determine which device cycle is oversampled. COPYRIGHT: (C)2007,JPO&INPIT
申请公布号 JP2007218913(A) 申请公布日期 2007.08.30
申请号 JP20070032840 申请日期 2007.02.14
申请人 VERIGY (SINGAPORE) PTE LTD 发明人 SLABODA KEVIN
分类号 G01R31/319 主分类号 G01R31/319
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