Low resistance and defect free epitaxial semiconductor material for providing merged FinFETs

摘要

A gate structure is formed straddling a first portion of a plurality of semiconductor fins that extend upwards from a topmost surface of an insulator layer. A dielectric spacer is formed on sidewalls of the gate structure and straddling a second portion of the plurality of semiconductor fins. Epitaxial semiconductor material portions that include a non-planar bottommost surface and a non-planar topmost surface are grown from at least the exposed sidewalls of each semiconductor fin not including the gate structure or the gate spacer to merge adjacent semiconductor fins. A gap is present beneath epitaxial semiconductor material portions and the topmost surface of the insulator layer. A second epitaxial semiconductor material is formed on the epitaxial semiconductor material portions and thereafter the second epitaxial semiconductor material is converted into a metal semiconductor alloy.

主权项

1. A semiconductor device comprising:
a plurality of semiconductor fins extending upward from a topmost surface of an insulator layer; a gate structure straddling a first portion of each semiconductor fin of said plurality semiconductor fins; a dielectric spacer located on a sidewall of each side of said gate structure and straddling a second portion of each semiconductor fin of said plurality semiconductor fins; epitaxial semiconductor material portions having a non-planar bottommost surface and a non-planar topmost surface located between and merging exposed semiconductor fin portions of an adjacent pair of semiconductor fins of said plurality of semiconductor fins; and a metal semiconductor alloy located on said non-planar bottommost surface and said non-planar topmost surface of said epitaxial semiconductor material portions, wherein a gap is present beneath said epitaxial semiconductor material portions and said topmost surface of said insulator layer.