发明名称 Vertical high-voltage semiconductor device and fabrication method thereof
摘要 To provide a vertical SIC-MOSFET and IGBT capable of having low ON-resistance without destruction of gate oxide films or degradation of reliability even when a high voltage is applied, and a fabrication method thereof, a vertical mosfet has a semiconductor layer and a base layer joined instead of a well region 6 so as to include, as a joining portion, a point that is farthest and equidistant from centers of all the source regions facing each other and that is closest and equidistant from end portions farthest from the centers of the source regions in a planar view.
申请公布号 US9362392(B2) 申请公布日期 2016.06.07
申请号 US201314396615 申请日期 2013.03.14
申请人 FUJI ELECTRIC CO., LTD. 发明人 Tanaka Atsushi;Iwamuro Noriyuki;Harada Shinsuke
分类号 H01L29/78;H01L29/16;H01L29/66;H01L29/739;H01L29/06;H01L29/10;H01L21/02;H01L21/04;H01L29/04 主分类号 H01L29/78
代理机构 Westerman, Hattori, Daniels & Adrian, LLP 代理人 Westerman, Hattori, Daniels & Adrian, LLP
主权项 1. A vertical high-voltage semiconductor device comprising: a first-conductivity-type semiconductor substrate; a first-conductivity-type semiconductor layer formed on the semiconductor substrate and having a concentration lower than the semiconductor substrate; a high-concentration second-conductivity-type semiconductor layer selectively formed in a surface of the semiconductor layer; a second-conductivity-type relatively low concentration semiconductor base layer formed on the first-conductivity-type semiconductor layer and the second-conductivity-type semiconductor layer; a first-conductivity-type source region selectively formed in a surface layer of the second-conductivity-type base layer; a first-conductivity-type well region formed to penetrate the second-conductivity-type base layer from a surface to the first-conductivity-type semiconductor layer; a gate electrode layer disposed via a gate insulating film on at least a portion of a surface exposed portion of the second-conductivity-type base layer interposed between the first-conductivity-type source region and the first-conductivity-type well region; a source electrode connected via the first-conductivity-type source region and a contact auxiliary layer to the second-conductivity-type base layer; and a drain electrode disposed on a back surface of the first-conductivity-type semiconductor substrate, wherein portions of the high concentration second-conductivity-type layer and the second-conductivity-type base layer are joined outside of the well region so as to include a point that is farthest and equidistant from centers of all the source regions facing each other and that is closest and equidistant from end portions farthest from the centers of the source regions in a planar view.
地址 Kawasaki-shi JP