Fault Tolerant Processor for Real-Time Systems

摘要

A fault tolerant multi-threaded processor uses the temporal and/or spatial separation of instructions running in two or more different threads. An instruction is fetched, decoded and executed by each of two or more threads to generate a result for each of the two or more threads. These results are then compared using comparison hardware logic and if there is a mismatch between the results obtained, then an error or event is raised. The comparison is performed on an instruction by instruction basis so that errors are identified (and hence can be resolved) quickly.

主权项

1. A multi-threaded processor comprising:
a scheduler implemented in hardware logic and arranged, in a first mode of operation, to cause an instruction in a program to be fetched by each of a plurality of threads; an execution stage implemented in hardware logic and arranged, in the first mode of operation, to execute each fetched instance of the instruction to generate a plurality of results for the instruction, one result for each of the plurality of threads; and comparison hardware logic arranged, in the first mode of operation, to compare the plurality of results for the instruction to determine if all the results match; wherein further action is taken by the multi-threaded processor in dependence on the result of comparison.