Syndrome computation in a layered low density parity check decoder

摘要

Apparatuses and methods associated with instant syndrome computation in a layered LDPC decoder are described. In one embodiment an apparatus includes a first hardware layer configured to compute a first group of syndrome values from one or more bit values in the codeword and a second hardware layer configured to compute a second group of syndrome values from one or more bit values in the codeword. The apparatus also includes a first physical memory associated with the first hardware layer and configured to store the first group of syndrome values until the syndrome values change due to a change in a codeword bit value. The apparatus also includes a second physical memory associated with the second hardware layer and configured to store the second group of syndrome values until the syndrome values change due to a change in a codeword bit value.

主权项

1. An apparatus configured to decode a codeword, comprising:
a first hardware layer configured to compute a first group of syndrome values from a first set of codeword bit values according to an LDPC code; a second hardware layer configured to compute a second group of syndrome values from a second set of codeword bit values according to the LDPC code; a first physical memory associated with the first hardware layer and configured to store the first group of syndrome values until a syndrome value in the first group of syndrome values changes due to a change in a codeword bit value in the first set of codeword bit values, a second physical memory associated with the second hardware layer and configured to store the second group of syndrome values until a syndrome value in the second group of syndrome values changes due to a change in a codeword bit value in the second set of codeword bit values; and wherein a matrix associated with the LDPC code is configured so that a column in the matrix has no more than a threshold number of non-zero circulants per physical memory.