Integrated circuits having multiple digitally-controlled oscillators (DCOs) therein that are slaved to the same loop filter

摘要

A phase-locked loop (PLL) integrated circuit includes multiple digitally-controlled oscillators (DCOs), which are slaved to the same feedback loop filter. This PLL includes a frequency control circuit, which is configured to generate a control signal and is responsive to a first periodic reference signal (e.g., REFCLK). The plurality of DCOs include a corresponding plurality of independently-programmable fractional dividers, which are configured to generate a respective plurality of periodic PLL output signals of different frequency in response to a second periodic reference signal (e.g., SYSCLK). The plurality of DCOs include corresponding scaling circuits, which are each responsive to the control signal. The plurality of scaling circuits are configured to scale the control signal to different degrees to thereby make effective gains of the DCOs more nearly equal.

主权项

1. A phase-locked loop (PLL) integrated circuit, comprising:
a frequency control circuit configured to generate a control signal in response to a first periodic reference signal; and a plurality of digitally-controlled oscillators (DCOs) configured to generate a respective plurality of periodic PLL output signals of different frequency in response to a second periodic reference signal, said plurality of DCOs comprising respective scaling circuits therein that are each responsive to the control signal.