发明名称 Dummy surface inserting method for e.g. very large scale integrated circuit, involves processing circuit design by insertion of surface patterns based on insertion hierarchy estimating design hierarchy by processing blocks and units
摘要 <p>The method involves processing integrated circuit design, layer by layer, by selective insertion of patterns of dummy surfaces according to an insertion hierarchy. The insertion hierarchy estimates design hierarchy of the circuit by individual processing of blocks (30) and interconnected units (2) and their interconnection routing. The patterns are selectively established based on methods used for design of the blocks (30). An independent claim is also included for a system of designing an integrated circuit.</p>
申请公布号 FR2866963(A1) 申请公布日期 2005.09.02
申请号 FR20040002011 申请日期 2004.02.27
申请人 BULL SA 发明人 ZORRILLA MARTA;BLANCHARD VIVIAN
分类号 G06F17/50;(IPC1-7):G06F17/50;H01L21/822 主分类号 G06F17/50
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