Serial communication test device, system including the same and method thereof

摘要

A serial communication test device, a system including the same, and a method thereof are provided, which relate to a technology that allows a master chip and a slave ship for Serial Peripheral Interface (SPI) communication to double-check data to increase reliability. The serial communication test device includes an interface that is configured to transmit and receive data to and from an external chip. A controller is configured to store data to be error-checked in a register to output the stored data to the external chip through the interface and to store data received from the external chip through the interface in a data storage unit. The controller compares the data stored in the register with the data stored in the data storage unit and determines whether the data stored in the register is substantially similar to data to be error-checked.

主权项

1. A serial communication test system comprising:
a master chip configured to:
output a data-read request signal so as to read data to be error-checked, andretransmit the read data; and a slave chip configured to:
transmit the data to be error-checked to the master chip through an interface in response to the data-read request signal,write data received from the master chip through the interface, andperform error checking by comparing the data transmitted to the master chip with the data received from the master chip, wherein the slave chip includes a controller configured to:
store the data to be error-checked in a register to output the stored data to the master chip through the interface,store the data received from the master chip through the interface in a data storage unit,compare the data stored in the register with the data stored in the data storage unit,when the data stored in the register is substantially similar to the data stored in the data storage unit, determined an address that corresponds to data received from the register using an address storage unit, andwhen the data stored in the register is not substantially similar to the data stored in the data storage unit, determine a presence of an error and transmit a result of erroneous data to the master chip.