发明名称 Hardware assisted format change mechanism in a display controller
摘要 Systems and methods are disclosed for hardware assisted format changes in a display controller. One embodiment of the invention relates to a format change system comprising a register DMA controller and a register update list. The register update list contains at least one instruction. The register DMA controller is adapted to obtain and use at least one instruction to configure at least one display pipeline from a plurality of display pipelines in response to at least one trigger event.
申请公布号 US9377987(B2) 申请公布日期 2016.06.28
申请号 US200210300370 申请日期 2002.11.20
申请人 BROADCOM CORPORATION 发明人 Law Patrick;Neuman Darren
分类号 G06F3/00;G06F13/00;G06F13/14;G06F13/28;G06F13/36;G06T1/00;G06T1/20;G06T15/00;G06F3/14;G06F3/06;G06F13/40;G06F17/50;H04N21/431;H04N21/4402 主分类号 G06F3/00
代理机构 Foley & Lardner LLP 代理人 Foley & Lardner LLP
主权项 1. A format change system comprising: a register update list configured to store a plurality of instructions for use in forming a plurality of display pipelines; and a hardware controller configured to obtain the plurality of instructions via a register bus and to control a configuration of a plurality of nodes to form the plurality of display pipelines using the plurality of instructions from the register update list, each of the plurality of nodes being configured to receive video information and to perform an operation on the received video information, the operation involving more than transmitting the received video information, the plurality of nodes comprising a first set of nodes, a second set of nodes, and a third set of nodes, the nodes in each set connected in parallel to at least one of a plurality of network modules; wherein the plurality of network modules are configured to interconnect a node from the first set of nodes, a node from the second set of nodes, and a node from the third set of nodes to form each of the plurality of display pipelines; the hardware controller configured to form a first display pipeline of the plurality of display pipelines in response to obtaining at least one first instruction from the register update list, the first display pipeline comprising a first node selected from the first set of nodes, a second node selected from the second set of nodes, and a third node selected from the third set of nodes, the first, second and third nodes selected for inclusion in the first display pipeline using the at least one first instruction, the hardware controller configured to form the first display pipeline by controlling at least one switch of each of the plurality of network modules to chain the first, second and third nodes together based on the at least one first instruction; and the hardware controller configured to form a second display pipeline of the plurality of display pipelines in response to obtaining at least one second instruction from the register update list, the second display pipeline comprising a fourth node selected from the first set of nodes, a fifth node selected from the second set of nodes, and a sixth node selected from the third set of nodes, the fourth, fifth and sixth nodes selected for inclusion in the second display pipeline using the at least one second instruction, the hardware controller configured to form the second display pipeline by controlling the at least one switch of each of the plurality of network modules to chain the fourth, fifth and sixth nodes together based on the at least one second instruction, wherein at least one of: the fourth node is different than the first node;the fifth node is different than the second node; orthe sixth node is different than the third node.
地址 Irvine CA US