| 摘要 |
A display device (1) includes: a scan line drive circuit (4) which line-sequentially selects from among a plurality of scan signal lines; at least one signal line drive circuit (3) which has a receiving circuit that receives a data signal, and which sequentially supplies the data signal to pixels linked to a scan signal line (6) selected by the scan line drive circuit (4); a timing controller (10) which defines, in accordance with sync signals received from an outside source, a non-scan period during which none of the scan signal lines is selected, and which transmits, to the at least one signal line drive circuit (3), an operation discriminant signal that causes the receiving circuit to be underrun during at least part of the non-scan period thus defined. The at least one signal line drive circuit (3) and the timing controller (10) are provided as separate entities. |
| 主权项 |
1. A display device comprising:
a scan line drive circuit which line-sequentially selects from among a plurality of scan signal lines; at least one signal line drive circuit which includes a receiving circuit that receives a data signal, and which sequentially supplies the data signal to pixels linked to a scan signal line selected by the scan line drive circuit; and a timing control section which defines, in accordance with sync signals received from an outside source, a non-scan period during which none of the scan signal lines is selected, and which transmits, to the at least one signal line drive circuit, a pause control signal, wherein the at least one signal line drive circuit and the timing control section are provided as separate entities; the at least one signal line drive circuit includes (i) an output circuit which outputs the data signal to the pixels and (ii) an output circuit control section which, in accordance with the pause control signal, causes the output circuit to be underrun; the output circuit includes a plurality of analog amplifiers, each of the plurality of analog amplifiers has a constant electric current flowing therethrough; the pause control signal causes the constant electric current flowing through at least some of the plurality of analog amplifiers to be stopped during at least part of the non-scan period to cause the output circuit to be underrun; when the receiving circuit is in a pause state in which it is underrun and the receiving circuit receives, from the timing control section, a recovery control signal that causes the receiving circuit to recover from the pause state, the receiving circuit receives a specific signal that the receiving circuit receives during an operating period in which the receiving circuit has recovered from the pause state, with the specific signal fixed to a Low level; and the specific signal includes a clock signal. |
