发明名称 Method of distance protection of parallel transmission line
摘要 The present invention is concerned with a method of distance protection of parallel transmission lines applicable both to series compensated and uncompensated electric power lines, using a distance relay. The method is characterized in that a pair of flags (ff1, ff2) are calculated for indication faulted and healthy circuits in parallel lines and in the same time a flag (Internal_Fault) for indication internal or external fault in parallel lines is calculated independently. Next gathering all calculated flags (ff1, ff2, Internal_Fault) an analyze of the value of these flags are performed and depending on the values of flags (ff1, ff2, Internal_Fault) and on their reciprocal relationship, a trip permission signal from the protection relay (4) is released and sent to the alarms devices or to the line breakers, or a block signal from the protection relay (4) is generated and sent to protect parallel lines before damage.
申请公布号 US9461458(B2) 申请公布日期 2016.10.04
申请号 US201214238543 申请日期 2012.08.06
申请人 ABB TECHNOLOGY AG 发明人 Balcerek Przemyslaw;Saha Murari;Rosolowski Eugeniusz;Izykowski Jan;Pierz Piotr
分类号 H02H3/42;H02H3/36;H02H7/26;H02H3/16 主分类号 H02H3/42
代理机构 代理人
主权项 1. A method for distance protection of parallel transmission lines comprises: measuring current and voltages signals from the individual phases (A, B, C) from both line circuit #1 and line circuit #2 of the parallel lines and optional zero sequence currents of both line circuit #1 and line circuit #2 of the parallel lines, processing the measured signals and using a protection relay (4) calculating a coefficient FAULT_Ph-G1(n) which indicates phase-to-ground faults in the line circuit #1, a coefficient FAULT_Ph-Ph1(n) which indicating a phase-to-phase fault in the line circuit #1, a coefficient FAULT_Ph-G2(n) which indicating phase-to-ground faults in the line circuit #2, a coefficient FAULT_Ph-Ph2(n) which indicating a phase-to-phase fault in the line circuit #2, calculating a pair of a flags (ff1, ff2) for indicating faulted and healthy circuits in parallel lines, where the flag (ff1) for line circuit #1 is calculated according to the following formula:ff1⁡(n)⁢{1when⁢{f1⁡(n)≥fthr⁢⁢AND⁢⁢FAULT_Ph-Ph1⁡(n)=1ORf01⁡(n)≥fthr⁢⁢AND⁢⁢FAULT_Ph-G1⁡(n)=1}0otherwise and where the flag (ff2) for line circuit #2 is calculated according to the following formula:ff2⁡(n)⁢{1when⁢{f2⁡(n)≥fthr⁢⁢AND⁢⁢FAULT_Ph-Ph2⁡(n)=1ORf02⁡(n)≥fthr⁢⁢AND⁢⁢FAULT_Ph-G2⁡(n)=1}0otherwise where: fthr—is a threshold for fault coefficients f1, f01, f2, f02 given by user,n—is the real consecutive number of the present digital sample processed by the protective device, FAULT_Ph-G1(n) is a fault type coefficient indicating phase-to-ground faults in the line #1, FAULT_Ph-Ph1(n) is a fault type coefficient indicating phase-to-phase fault in the line #1 or non-fault conditions, FAULT_Ph-G2(n) is a fault type coefficient indicating phase-to-ground faults in the line #2, FAULT_Ph-Ph2(n) is a fault type coefficient indicating a phase-to-phase fault in the line #2 or non-fault conditions, calculating a flag (Internal_Fault) for indicating internal or external fault in parallel lines in independent way according to the formula:Internal_Fault⁢(n)={1when⁢{sdi_max⁢(n)sdi_min⁢(n)>sdithr⁢⁢AND⁢⁢FAULT_Ph-Ph⁡(n)=1ORsdi_⁢0⁢max⁡(n)sdi_⁢0⁢min⁡(n)>sdithr⁢⁢AND⁢⁢FAULT_Ph-G⁡(n)=10otherwise where:sdithr—is a different current sum coefficient threshold given by the user,sdi_max(n), sdi_0max(n)—are maximum values of the sum of the current differences,sdi_min(n), sdi_0min(n)—are minimum values of the sum of the current differences,n—is the real consecutive number of the present digital sample processed by the protective device,FAULT_Ph-G(n) is a fault type coefficient indicating phase-to-ground faults,FAULT_Ph-Ph(n) is a fault type coefficient indicating phase-to-phase fault, gathering all calculated flags (ff1, ff2, Internal_Fault) an analyze of the reciprocal relationship between the values of these flags and when: ff1=1 AND Internal_Fault=1 AND ff2=0 AND Internal_Fault=1,it means that fault within protected line circuit #1 has been identified and fault impedance (ZF) is calculated in the known way with using the three phase to ground loops and the multi-phase faults loops and additionally if the apparent fault impedance (ZF) is outside the relay zone operation characteristic (ZI) then a block signal from the protection relay (4) is released,ORwhen: ff1=1⁢⁢AND⁢⁢Internal_Fault=0⁢⁢OR⁢ff1=0⁢⁢AND⁢⁢Internal_Fault=1⁢⁢ORff2=0⁢⁢AND⁢⁢Internal_Fault=0⁢⁢ORff2=0⁢⁢and⁢⁢Internal_Fault=1⁢⁢ORff2=1⁢⁢AND⁢⁢Internal_Fault=1⁢⁢ORff2=1⁢⁢AND⁢⁢Internal_Fault=0⁢⁢OR⁢⋮ff2=1⁢⁢AND⁢⁢Internal_Fault=0,⁢}it means that fault outside protected line circuit #1 has been identified and a block signal from the protection relay 4 is generated, OR when ff1=1 AND Internal_Fault=1 AND ff2=0 AND Internal_Fault=1,it means that fault within protected line circuit #1 has been identified and fault impedance (ZF) is calculated in the known way with using the three phase to ground loops and the multi-phase faults loops and additionally if the apparent fault impedance (ZF) is within the relay zone operation characteristic (ZI) then a permission trip signal from the protection relay (4) is released, realising a trip permission signal from the protection relay (4) and sending it to the alarms devices or to the line breakers, or generating a block signal from the protection relay (4) and sending it to the users in order to protect parallel lines.
地址 Zurich CH